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Espressif Systems /ESP32-S2 /RTC_CNTL /TIMER1

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Interpret as TIMER1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CPU_STALL_EN)CPU_STALL_EN 0CPU_STALL_WAIT 0CK8M_WAIT0XTL_BUF_WAIT0PLL_BUF_WAIT

Description

Configures CPU stall options

Fields

CPU_STALL_EN

Enables CPU stalling.
CPU_STALL_WAIT

Sets the CPU stall waiting cycle (using the RTC fast clock).
CK8M_WAIT

Sets the 8 MHz clock waiting (using the RTC slow clock).
XTL_BUF_WAIT

Sets the XTAL waiting cycle (using the RTC slow clock).
PLL_BUF_WAIT

Sets the PLL waiting cycle (using the RTC slow clock).

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data